TrendForce：2027年DRAM供应持续紧张，促使英伟达降低Rubin Ultra的HBM配置关键事件
TrendForce最新研究显示，DRAM供应紧张将持续至2027年，内存供应商HBM4e验证时间表存在不确定性。英伟达因此降低Rubin Ultra的HBM配置。该趋势影响DRAM及HBM供应链，可能导致存储芯片供应短缺和交期延长。
原文深度解读
TrendForce最新研究显示，DRAM供应紧张将持续至2027年，内存供应商HBM4e验证时间表存在不确定性。英伟达因此降低Rubin Ultra的HBM配置。该趋势影响DRAM及HBM供应链，可能导致存储芯片供应短缺和交期延长。
- TrendForce研究指出，DRAM供应紧张将持续至2027年，且HBM4e验证时间表存在不确定性。
- 自2026年第三季度初，英伟达开始评估Rubin Ultra的HBM配置，除原12-Hi HBM4e外，还包括8-Hi HBM4e、12-Hi HBM4和8-Hi HBM4等替代方案，最终规格尚未确定。
- 多家CSP也在评估下一代自研AI ASIC的较低HBM容量。
- 2026年上半年，CSP和服务器OEM已因内存短缺降低了服务器配置的RDIMM容量；英伟达因LPDDR5X供应限制可能持续至2027年，决定将下一代Vera Rubin Superchip模块的SOCAMM容量减半。
- 英伟达在2025年至2026年上半年维持12-Hi HBM4e作为Rubin Ultra的基线设计，但自3Q26初开始评估低规格替代方案，主要受2027年DRAM整体短缺和12-Hi HBM4e验证及良率爬坡不确定性驱动。
- TrendForce预计2027年HBM位出货量同比增长50-60%，但仍不足以满足需求增长，HBM供应商将保持定价权，HBM价格预计大幅上涨。
供应链影响
- DRAM供应紧张可能持续至2027年，影响内存供应商对HBM生产的晶圆分配，进而影响HBM供应量。
- HBM4e验证时间表的不确定性可能导致Rubin Ultra的I/O速度提升受限，可能影响AI芯片性能和市场竞争力。
- 英伟达和CSP降低HBM配置可能减少对高堆叠HBM的需求，但可能增加对低堆叠HBM或替代内存的需求。
- HBM价格预计上涨，可能增加AI芯片厂商的采购成本，进而影响其产品定价和利润率。
- 内存短缺已导致RDIMM和SOCAMM容量调整，可能影响服务器和AI模块的供应和交期。
系统解读，仅作为判断线索，不构成备货、出货、涨价或投资建议。
根据TrendForce最新的内存行业研究，DRAM供应紧张将持续至2027年，且内存供应商的HBM4e验证时间表仍存在不确定性。这些限制因素共同促使AI芯片厂商缩减其下一代产品的HBM配置。
自2026年第三季度以来，英伟达已开始将其Rubin Ultra的HBM配置评估范围从最初的12-Hi HBM4e设计扩展到包括8-Hi HBM4e、12-Hi HBM4和8-Hi HBM4等替代方案。最终规格尚未确定。除英伟达外，多家CSP也在评估其下一代自研AI ASIC的较低HBM容量。
TrendForce指出，近期的内存短缺已导致AI芯片内存规格多次调整。例如，CSP和服务器OEM在2026年上半年降低了服务器配置的RDIMM容量。最近，英伟达在确定LPDDR5X供应限制可能持续至2027年后，决定将其下一代Vera Rubin Superchip模块的SOCAMM容量减半。
英伟达在2025年至2026年上半年期间维持12-Hi HBM4e作为Rubin Ultra的基线设计。然而，自3Q26初开始，该公司开始评估低规格替代方案。这一变化主要由两个供应侧限制驱动：第一，预计2027年DRAM整体短缺将限制内存供应商可分配给HBM生产的晶圆产能；第二，12-Hi HBM4e的验证进度和良率爬坡仍存在不确定性。
TrendForce指出，英伟达对Rubin Ultra一代的主要目标是提升I/O速度，而扩大GPU出货量仍是次要优先事项。如果英伟达最终决定缩减其HBM规格，预计将通过减少DRAM堆叠层数来实现。
最终，HBM4e能否按时完成验证并进入量产，将决定Rubin Ultra的I/O速度能否从前一代Rubin的8–11.7 Gbps提升至14–16 Gbps，还是仅能通过HBM4设计优化达到11–12 Gbps。
同时，在给定世代内，DRAM堆叠层数决定了每GPU的HBM容量与可出货GPU数量之间的权衡。
TrendForce认为，最终配置还将取决于内存供应商的晶圆分配决策。从供需角度看，2027年HBM位出货量预计同比增长50–60%，但仍不足以跟上需求增长。
TrendForce预计，在供应受限的情况下，HBM供应商将在2027年全年保持定价权，业内已普遍预期HBM价格将大幅上涨。因此，AI芯片厂商将面临HBM供应有限和采购成本上升的双重挑战，这增加了采用较低容量HBM配置的动机。
According to TrendForce's latest memory industry research, DRAM supply will remain tight through 2027, and uncertainty persists over memory suppliers' HBM4e validation timelines. Together, these constraints are prompting AI chip vendors to scale back the HBM configurations of their next-generation products.
Since the third quarter of 2026, NVIDIA has begun expanding its evaluation of the Rubin Ultra’s HBM configuration beyond its original 12-Hi HBM4e design to include 8-Hi HBM4e, 12-Hi HBM4, and 8-Hi HBM4 alternatives. The final specification has yet to be determined. In addition to NVIDIA, several CSPs are also evaluating lower HBM capacities for their next-gen in-house AI ASICs.
TrendForce notes that recent memory shortages have already led to several adjustments to AI chip memory specifications. For instance, CSPs and server OEMs reduced RDIMM capacities for server configurations during the first half of 2026. More recently, NVIDIA decided to halve the SOCAMM capacity of its next-generation Vera Rubin Superchip modules after determining that LPDDR5X supply constraints are likely to continue through 2027.
NVIDIA maintained 12-Hi HBM4e as the baseline design for the Rubin Ultra from 2025 through the first half of 2026. However, beginning in early 3Q26, the company started evaluating lower-specification alternatives. This change is primarily driven by two supply-side constraints: First, the overall DRAM shortage expected in 2027 will limit the wafer capacity that memory suppliers can allocate to HBM production. Second, there are still uncertainties regarding the validation schedule and production yield ramp-up for 12-Hi HBM4e.
TrendForce notes that NVIDIA’s primary objective for the Rubin Ultra generation is to increase I/O speed, while expanding GPU shipment volume remains a secondary priority. If NVIDIA ultimately decides to scale back its HBM specifications, it is expected to do so by reducing the number of DRAM stack layers.
Ultimately, whether HBM4e completes validation and enters mass production on schedule will determine whether Rubin Ultra's I/O speed can be raised from the previous-generation Rubin's 8–11.7 Gbps to 14–16 Gbps, or whether it will only reach 11–12 Gbps through HBM4 design optimization.
Meanwhile, within a given generation, the number of DRAM stack layers determines the trade-off between HBM capacity per GPU and the number of GPUs that can be shipped.
TrendForce believes the final configuration will also depend on wafer allocation decisions made by memory suppliers. From a supply-demand perspective, HBM bit shipments are projected to grow by 50–60% YoY in 2027, which will still be insufficient to keep pace with demand growth.
TrendForce expects HBM suppliers to retain pricing power throughout 2027 under these supply-constrained conditions, with significant increases in HBM pricing already widely anticipated across the industry. AI chip vendors will therefore face the dual challenge of both limited HBM supply and higher procurement costs, increasing the incentive to adopt lower-capacity HBM configurations.