Eugene Technology完成用于亚10纳米DRAM的TiN ALD设备开发
Eugene Technology已完成用于亚10纳米DRAM制造的氮化钛原子层沉积设备的开发，并准备商业化。该设备用于DRAM制造中的TiN沉积，面向先进制程。
原文深度解读
本文报道了韩国设备商Eugene Technology完成用于亚10纳米DRAM制造的氮化钛（TiN）原子层沉积（ALD）设备开发，并准备商业化。该设备用于DRAM电容电极薄膜沉积，其生产率是海外同类设备的两倍以上，并实现了关键部件国产化以降低供应链风险。公司计划通过国内存储制造商的认证测试，以替代应用材料（Applied Materials）和泛林半导体（Lam Research）等海外供应商的产品。文章涉及主体包括Eugene Technology、应用材料、泛林半导体、周星工程（Jusung Engineering）、Wonik IPS等，时间点为2021年开始开发，2024年8月宣布完成。关键数字包括开发周期约四年九个月、生产率超过两倍、覆盖率接近100%。
- Eugene Technology于2024年8月4日宣布，本月将完成用于亚10nm DRAM电容电极薄膜制造的TiN ALD系统开发，该系统开发始于2021年，历时约四年九个月。
- 该设备目前正在进行演示评估，通过运行客户的图案晶圆来验证目标工艺规格；图案晶圆是包含精细电路结构、已完成前端半导体处理的晶圆。
- Eugene Technology的亚10nm TiN ALD系统关键特点是生产率超过现有海外设备两倍以上，其多级架构实现了高晶圆每小时吞吐量（WPH），并通过集成专有设备组件和化学材料技术实现高台阶覆盖率。
- 台阶覆盖率指无论晶圆表面形貌如何都能沉积均匀厚度薄膜的能力，接近100%的覆盖率可在复杂高深宽比三维结构的侧壁和底部均匀成膜；DRAM单元由晶体管和电容器组成，电极或绝缘膜不均匀或断裂会导致缺陷和可靠性问题。
- ALD是化学气相沉积（CVD）的衍生技术，通过化学反应逐原子层生长薄膜，具有自限制特性，表面饱和后额外前驱体气体不会继续生长，使工艺气体能到达深沟槽底部而不封闭窄开口，适合高深宽比结构。
- 公司改进了机械设计以确保前驱体气体均匀分布和精确排气控制，并实现了节流阀、磁流体密封和电机驱动系统等关键ALD部件的国产化，经客户评估后集成到设备中，预计可降低地缘政治不确定性带来的供应链风险。
供应链影响
- Eugene Technology的设备商业化可能改变亚10nm DRAM电容电极沉积设备市场的供应商格局，但市场份额取决于其通过国内存储制造商认证测试的能力和客户接受度。
- 关键部件（节流阀、磁流体密封、电机驱动系统）的国产化可能降低对海外供应商的依赖，从而减少地缘政治风险对供应链的潜在影响，但实际效果取决于这些部件的性能和长期可靠性。
- 该设备的高生产率（超过两倍）可能影响存储制造商的产能规划，但具体影响取决于其在实际生产环境中的稳定性和良率表现。
- 公司计划扩展到其他相关沉积工艺，这可能为其他先进制程设备供应链带来潜在替代选择，但取决于技术验证和市场需求。
- 国内竞争对手（周星工程、Wonik IPS）的产品仍处于评估阶段，Eugene Technology的率先商业化可能影响竞争态势，但最终市场份额取决于各厂商的技术成熟度和客户关系。
系统解读，仅作为判断线索，不构成备货、出货、涨价或投资建议。
应用材料公司用于2纳米环绕栅极（GAA）半导体工艺的Endura Trillium ALD系统。（图片来源：应用材料）
Eugene Technology已完成用于亚10纳米（nm）DRAM制造的氮化钛（TiN）原子层沉积（ALD）系统开发，并准备商业化。该市场目前实际上由应用材料（Applied Materials）和泛林半导体（Lam Research）等外国供应商主导。包括周星工程（Jusung Engineering）和Wonik IPS在内的国内竞争对手也开发了类似设备，但其产品仍处于评估阶段。Eugene Technology经过约四年九个月的开发，现已接近商业化。
该公司于8月4日表示，将于本月完成“用于亚10nm DRAM电容电极薄膜制造的TiN ALD系统”的开发。该设备目前正在进行演示评估以验证其性能。该工艺涉及将客户的图案晶圆通过系统运行，以确认目标工艺规格。图案晶圆是包含精细电路结构的晶圆，代表已经过或完成前端半导体处理的产品。
Eugene Technology的亚10nm TiN ALD系统的一个关键特点是生产率超过现有海外设备两倍以上。该公司表示，其多级架构实现了高晶圆每小时吞吐量（WPH）。通过集成专有设备组件和化学材料技术，实现了高台阶覆盖率。
台阶覆盖率是指无论晶圆表面形貌如何，都能沉积厚度均匀的薄膜的能力。接近100%的覆盖率允许在复杂的高深宽比三维结构的侧壁和底部均匀成膜。
DRAM单元由晶体管和电容器组成。电容器存储电荷，其结构为导电电极薄膜包围阻挡电流的绝缘层。这些结构以狭窄而深的几何形状制造。如果电极或绝缘膜不均匀或存在不连续，可能导致半导体缺陷和可靠性问题。因此，高台阶覆盖率至关重要。
ALD是化学气相沉积（CVD）技术的衍生技术，通过化学反应逐原子层构建薄膜。由于其自限制特性，一旦表面层被反应物饱和，额外的前驱体气体不会产生进一步的薄膜生长。这使得工艺气体能够到达深沟槽底部而不会封闭窄开口，从而实现高度保形沉积，使ALD特别适合高深宽比结构。
Eugene Technology表示，它改进了系统的机械设计，以确保前驱体气体均匀分布和精确排气控制。公司还实现了关键ALD部件的国产化，包括节流阀、磁流体密封和电机驱动系统，并在客户评估后将其集成到设备中。节流阀精确调节沉积压力，而磁流体密封在旋转轴周围维持高真空条件。通过实现主要真空和机械部件的国产化，公司预计将降低因地缘政治不确定性引起的供应链风险。
公司计划使用新系统与国内存储制造商进行认证测试。其目标是替代目前主导亚10nm DRAM电容电极沉积市场的国外设备制造商供应的产品，并最终获得显著市场份额。Eugene Technology还打算扩展到具有相关技术要求其他沉积工艺。
“亚10nm DRAM工艺的TiN ALD设备市场目前由泛林半导体和应用材料等海外供应商主导，”一位行业消息人士表示。“包括Wonik IPS和周星工程在内的国内设备制造商已开发出竞争系统，但这些产品仍处于评估阶段，目前市场份额很小。”
随着DRAM制造持续缩小至10nm节点以下，能够精确沉积电容电极薄膜的ALD技术变得至关重要。Eugene Technology于2021年开始开发该系统，以与周星工程和Wonik IPS等国内竞争对手竞争，并满足领先存储制造商的工艺要求。
Applied Materials' Endura Trillium ALD system for 2nm gate-all-around (GAA) semiconductor processes. (Photo: Applied Materials)
Eugene Technology has completed development of a titanium nitride (TiN) atomic layer deposition (ALD) system for sub-10-nanometer (nm) DRAM manufacturing and is preparing for commercialization. The market has been effectively dominated by foreign suppliers such as Applied Materials and Lam Research. Domestic competitors including Jusung Engineering and Wonik IPS have also developed similar equipment, but their products remain in the evaluation stage. Eugene Technology is now nearing commercialization after approximately four years and nine months of development.
The company said on Aug. 4 that it will complete development of its "TiN ALD system for manufacturing capacitor electrode films in sub-10nm DRAM" this month. The equipment is currently undergoing demonstration evaluations to verify its performance. The process involves running customers' patterned wafers through the system to confirm targeted process specifications. Patterned wafers are wafers containing fine circuit structures and represent products that have undergone, or completed, front-end semiconductor processing.
A key feature of Eugene Technology's sub-10nm TiN ALD system is productivity that exceeds existing overseas equipment by more than twofold. The company said its multi-stage architecture enables high wafer-per-hour (WPH) throughput. High step coverage is achieved through the integration of proprietary equipment components and chemical-material technologies.
Step coverage refers to the ability to deposit thin films with uniform thickness regardless of wafer surface topology. Coverage approaching 100% allows films to be formed evenly along the sidewalls and bottom surfaces of complex, high-aspect-ratio three-dimensional structures.
A DRAM cell consists of a transistor and a capacitor. The capacitor stores electrical charge and is structured with conductive electrode films surrounding an insulating layer that blocks current flow. These structures are fabricated in narrow and deep geometries. If the electrode or insulating films are non-uniform or contain discontinuities, semiconductor defects and reliability issues can result. High step coverage is therefore critical.
ALD is a derivative of chemical vapor deposition (CVD) technology that builds thin films one atomic layer at a time through chemical reactions. Because of its self-limiting characteristics, once a surface layer is saturated with reactants, additional precursor gas does not create further film growth. This allows process gases to reach the bottom of deep trenches without sealing off narrow openings, enabling highly conformal deposition and making ALD particularly suitable for high-aspect-ratio structures.
Eugene Technology said it improved the system's mechanical design to ensure uniform precursor gas distribution and precise exhaust control. The company also localized key ALD components, including throttle valves, magnetic fluid seals and motor-driven systems, incorporating them into the tool after customer evaluations. Throttle valves precisely regulate deposition pressure, while magnetic fluid seals maintain high-vacuum conditions around rotating shafts. By localizing major vacuum and mechanical components, the company expects to reduce supply-chain risks arising from geopolitical uncertainties.
The company plans to pursue qualification testing with domestic memory manufacturers using the new system. Its goal is to replace products supplied by foreign equipment makers that currently dominate the sub-10nm DRAM capacitor electrode deposition market and ultimately secure significant market share. Eugene Technology also intends to expand into other deposition processes with related technological requirements.
"The TiN ALD equipment market for sub-10nm DRAM processes is currently dominated by overseas suppliers such as Lam Research and Applied Materials," an industry source said. "Domestic equipment makers including Wonik IPS and Jusung Engineering have developed competing systems, but those products are still in the evaluation stage and currently hold little market share."
As DRAM manufacturing continues to scale below the 10nm node, ALD technology capable of precisely depositing capacitor electrode films has become essential. Eugene Technology began developing the system in 2021 to compete with domestic rivals such as Jusung Engineering and Wonik IPS and to meet the process requirements of leading memory manufacturers.