EE Times原文发布 08-11 22:09Radar 收录 08-11 22:31查看原文 ↗

AMD挑战以GPU为中心的架构，瞄准英伟达的机器人市场

AMD Challenges GPU-centric Architectures as It Takes Aim at Nvidia in Robotics

中文摘要

AMD发布用于机器人的新型SoC，将CPU、GPU、NPU集成于单芯片，并采用统一内存架构。该产品旨在与英伟达在机器人领域竞争。此芯片属于元器件新产品，对机器人供应链中的计算模块选择有影响。

原文深度解读

本文报道了AMD在机器人领域推出新型异构SoC Ryzen AI X100，挑战以GPU为中心的AI架构，旨在与英伟达竞争。该芯片集成了x86 CPU、GPU和NPU，采用统一内存架构，强调确定性延迟和开放生态。文章涉及AMD高管观点、产品规格（126 TOPS INT8，NPU占50 TOPS）、Kria AI SoM和开发者平台，以及AMD在机器人供应链中的战略定位。

AMD推出Ryzen AI X100，集成Zen 5 CPU、RDNA 3.5 GPU和XDNA2 NPU，统一内存架构，总计算能力126 TOPS INT8，其中NPU占约50 TOPS。
AMD认为物理AI（机器人）需要异构计算，GPU-centric架构存在局限，CPU需求在机器人应用中比GPU更高。
AMD高管指出，机器人客户的首要需求是确定性延迟，而非原始延迟，统一内存有助于减少CPU和GPU分离带来的延迟。
AMD强调开放架构，避免供应商锁定，Kria AI SoM采用COM-HPC标准，并开源原理图、BOM和RTL代码。
AMD的嵌入式软件栈基于ROCm和机器人SDK，并计划与OEM、模型、中间件、传感器、系统集成商等合作伙伴构建生态系统。
AMD的目标是尽可能用其SoC取代机器人中的大型GPU，提供系统级架构设计能力。

供应链影响

AMD的Ryzen AI X100可能影响机器人计算模块的选型，促使更多设计采用异构SoC而非独立GPU，取决于客户对延迟和开放性的需求。
Kria AI SoM的开放设计可能推动ODM和第三方载板开发，增加供应链中定制化载板的需求，取决于开发者采用率。
AMD的生态合作策略可能改变机器人供应链中的合作伙伴格局，影响传感器、中间件等环节的集成方式，取决于合作进展。
统一内存架构可能减少对独立内存组件的依赖，影响内存供应链，取决于实际产品设计。
AMD的竞争可能促使英伟达调整产品策略，影响机器人GPU市场的供应结构，取决于市场反应。

系统解读，仅作为判断线索，不构成备货、出货、涨价或投资建议。

正文内容 · AI翻译

中文英文

旧金山——AMD押注物理AI，特别是机器人领域，其异构SoC将比大型GPU更适用。该公司推出了Ryzen AI X100，将x86 CPU、GPU和NPU与统一内存架构相结合，反映了AMD的观点：物理AI客户的优先事项是确定性延迟以及开放的硬件和软件生态系统。

AMD的客户正在开发从手术机器人到仓库、配送、制造和检测机器人的应用，在这些应用中，FPGA长期以来一直支持传感、传感器融合和数据聚合。

AMD认为，物理AI正在暴露GPU-centric AI架构在这些应用中的局限性。人形机器人的“大脑”执行编排、感知、推理和控制——这些异构任务需要异构计算——而FPGA则更靠近系统的传感器边缘（可能位于摄像头后面用于图像处理，或位于手指中）。

“在机器人中，除了AI之外，还有很多编排工作必须发生，”AMD自适应和嵌入式部门高级副总裁兼总经理Salil Raje告诉EE Times。“规划、决策和推理需要AI加速器——GPU或NPU——但我们确实注意到对CPU的需求更大。许多客户使用GPU大脑，并单独配备更大的Intel或AMD CPU来执行编排，确保整个系统继续协同工作。”

作者：Juergen Jaeger，西门子EDA原型产品战略总监 2026年8月10日

作者：Piyush Sancheti，中央工程解决方案（3D IC）副总裁，以及Todd Burkholder，西门子EDA 3D IC技术作家 2026年8月5日

作者：Alessandro Chimera，Spotfire行业解决方案负责人 2026年8月5日

AMD的Ryzen AI 100针对物理AI应用（包括机器人）进行了优化。（来源：AMD）

Raje表示，问题在于拥有独立的CPU和GPU会增加延迟。将CPU、GPU和NPU集成在单个芯片上并采用统一内存是加速的最佳方式，他补充道。

AMD自适应和嵌入式部门产品、软件和解决方案企业副总裁Kirk Saban告诉EE Times，人形机器人将成为代理式AI的终极形式。

“这与我们在数据中心世界看到的情况相同，CPU需求因代理式AI而激增，这在物理AI中也在发生，”Saban说。“是的，你需要GPU，但并非全是GPU，我们的大多数基准测试表明，自主机器人需要更多CPU计算而非GPU计算。这就是为什么人形机器人的大脑不仅仅是一个巨大的GPU。”

Saban补充说，统一内存允许软件决定为特定任务分配多少内存。这使得像Ryzen AI X100这样的SoC能够通过高效地为计算引擎提供数据，从而超越独立的“大铁”GPU。

Ryzen AI X100采用Zen 5 CPU、独立级RDNA 3.5 GPU和XDNA2 NPU于同一芯片上。NPU约占芯片总计算能力126 TOPS INT8中的50 TOPS，并将处理对功耗和延迟敏感的常开AI工作负载。

“延迟是致命的，”Saban说。“你必须能够从摄像头输入开始，进行图像信号处理，将其引入AI模型，进行分类，确定机器人前方是什么——所有这些都必须在确定性的延迟内完成，以便人形机器人在物理世界中正确反应。”

Raje表示，机器人客户的第一大需求实际上是延迟的确定性，这甚至比原始延迟更重要。

“重要的是模型在合理时间内运行，但如何对其采取行动，整个流程循环如何收敛，这才是人们寻求的确定性类型，”Raje说。“这就是为什么不仅仅是大脑重要，你需要将计算分布到整个身体，而FPGA和自适应SoC在这方面非常确定。”

供应商锁定

机器人客户的高优先级需求还包括避免供应商锁定。Saban表示，客户喜欢开放架构，这意味着他们不必依赖专有标准。

他说，AMD致力于开源硬件和软件。

采用Ryzen AI X100的新型Kria AI SoM将采用COM-HPC板型，而非专有格式。该SoM将用于新的Kria AI机器人开发者套件，位于载板上。所有原理图、物料清单，甚至载板上Spartan UltraScale+ FPGA的RTL代码都将开源。

AMD的Kria AI SoM由Ryzen AI X100提供动力。（来源：AMD）

“开放设计的目的是让开发硬件的开发者构建自己的版本，因为我们套件中的板子不太可能适合他们正在构建的任何系统，他们需要构建自己的载板，可能通过我们的ODM合作伙伴之一，”Saban说。“我们给他们一个起点和快速启动的方法，我们给他们原理图，我们给他们一个已知可工作的平台，本质上……这允许他们根据需要进行修改。”

AMD的嵌入式软件栈基于ROCm加上机器人SDK（还有更广泛的物理AI SDK）。机器人软件，包括机器人操作系统（ROS），仍在成熟中，因为人形机器人公司仍处于开发的早期阶段。

“我认为我们将看到行业在机器人软件栈方面的大量投资，”Saban说。“开源是快速前进的方式……让我们的开发平台进入成百上千开发者手中，将非常迅速地加速开源模型和软件的发展。”

Saban表示，AMD理解为机器人构建生态系统的重要性，并正在与OEM合作伙伴、模型合作伙伴、中间件合作伙伴、传感器合作伙伴、系统集成商合作伙伴、物理仿真合作伙伴和验证合作伙伴合作。

AMD的Kria AI机器人开发者平台旨在帮助客户和开发者原型设计、构建和部署下一代机器人和物理AI系统。（来源：AMD）

取代大型GPU

Raje表示，AMD的最终目标是尽可能用其产品取代机器人中的大型GPU。

“我们不断听到的是，竞争对手存在供应商锁定，”Raje说。“客户想要更多自由、更多灵活性、更多差异化……例如，他们可能需要各种不同的板型。”

与独立FPGA相比，独立FPGA预计在机器人领域有很高的采用率，Raje表示，客户更关注系统级性能和整体架构。

“我们在CPU、FPGA和自适应SoC方面处于非常有利的地位，因为我们可以审视整个架构，并与客户共同设计他们的解决方案，”Raje说。“有很多应用场景中，CPU与FPGA和自适应SoC并排使用——信息娱乐、ADAS、安全防火墙、网络、机器人。你想进行什么样的对话？你想讨论独立的FPGA组件，还是整个系统级？”

Saban补充说，AMD的一大优势是能为问题带来正确的计算类型。

“嵌入式领域的挑战非常多样化，与客户端和服务器截然不同，”Saban说。“无论你试图解决什么挑战，我们都能解决你的系统级挑战……我们可以在系统架构层面参与。并非每个钉子都需要GPU锤子，我们可以提供最适合你应用的计算类型，这是与任何竞争对手相比的巨大差异化优势。在这方面，没有人能与我们匹敌。”

另请阅读：

十年七任CEO后，Imagination坚持其战略

AI芯片初创公司Taalas被AMD收购

高通为何收购开放AI软件栈

嵌入式、FPGA、IC、物理AI、机器人、半导体

AMD、AMD-XILINX

SAN FRANCISCO — AMD is betting physical AI, specifically robotics, will be better served by its heterogeneous SoC over big GPUs. The company launched its Ryzen AI X100, which combines an x86 CPU, GPU, and NPU with a unified memory architecture, reflecting AMD’s view that physical AI customers’ priorities are a combination of deterministic latency as well as open hardware and software ecosystems.

AMD’s customers are working on applications ranging from surgical robots to warehouse, delivery, manufacturing, and inspection robots, where FPGAs have long enabled sensing, sensor fusion, and data aggregation.

AMD believes physical AI is exposing the limitations of GPU-centric AI architectures in these applications. The “brain” of a humanoid robot does orchestration, perception, reasoning, and control—heterogeneous tasks that require heterogeneous compute—with FPGAs used closer to the sensor edge of the system (perhaps behind cameras for image processing, or in the fingers).

“There’s a lot of orchestration that has to happen along with AI [in a robot],” Salil Raje, senior VP and general manager of AMD’s Adaptive and Embedded group, told EE Times. “Planning, decision-making and inference needs an AI accelerator—GPU or NPU—but we did notice there is a lot more demand on the CPU. Many customers have a GPU brain with a larger Intel or AMD CPU separately to do orchestration and make sure the entire system continues to work cohesively.”

By Juergen Jaeger, Director of Prototyping Product Strategy, Siemens EDA 08.10.2026

By Piyush Sancheti, VP Central Engineering Solutions (3D IC), and Todd Burkholder, 3D IC Technology Writer, Siemens EDA 08.05.2026

By Alessandro Chimera, Industry Solutions Lead, Spotfire 08.05.2026

AMD’s Ryzen AI 100 is optimized for physical AI applications, including robotics. (Source: AMD)

The trouble, Raje said, is that having separate CPUs and GPUs adds latency. Combining CPU, GPU, and NPU on a single chip with a unified memory is the best way to speed things up, he added.

Kirk Saban, corporate VP of products, software, and solutions in AMD’s Adaptive and Embedded group, told EE Times that humanoid robots will be the ultimate form of agentic AI.

“It’s the same thing we’re seeing happen in the data center world, with CPU [demand] exploding for agentic AI, that’s happening in physical AI,” Saban said. “Yes, you need a GPU, but it’s not all about GPU, most of our benchmarks need more CPU than GPU compute for autonomous robots. That’s why the brain [of a humanoid] isn’t just a honking big GPU.”

Unified memory allows software to decide how much memory is allocated to particular tasks, Saban added. This allows SoCs like the Ryzen AI X100 to outshine discrete “big iron” GPUs by enabling efficient feeding of the compute engines.

The Ryzen AI X100 features a Zen 5 CPU, discrete-class RDNA 3.5 GPU, and an XDNA2 NPU on the same chip. The NPU accounts for about 50 of a total of 126 TOPS INT8 compute for the chip and will handle always-on AI workloads that are power- and latency-sensitive.

“Latency is a killer,” Saban said. “You have to be able to get from the camera input, do the image signal processing on that, bring it in [to the AI model], do the classification, figure out what’s in front of the robot—do all that in a deterministic amount of latency so the humanoid can react properly in the physical world.”

Robotics customers’ number one demand is actually that latency be deterministic, which is more important even than raw latency, Raje said.

“[It’s important that] the models run in a reasonable amount of time, but how you act on it, how the whole flow loop converges, that’s the type of determinism people are looking for,” Raje said. “That’s one of the reasons why it’s not just the brain [that’s important], you need to distribute the compute in the whole body, where FPGAs and adaptive SoCs are very deterministic.”

Vendor lock-in

High up on robotics’ customers wish-lists is also avoiding vendor lock-in. Customers like an open architecture which means they don’t have to leverage proprietary standards, Saban said.

AMD is committed to open-source hardware and software, he said.

The new Kria AI SoM featuring the Ryzen AI X100 will be a COM-HPC board, rather than a proprietary format. This SoM will go into a new Kria AI Robotics developer box, on a carrier card. All the schematics, the bill of materials and even the RTL code for the Spartan UltraScale+ FPGA on the carrier card will be open sourced.

AMD’s Kria AI SoM is powered by the Ryzen AI X100. (Source: AMD)

“The purpose [of opening up designs] is that developers building hardware will build their own versions, because the board in our box is unlikely to fit into whatever system they’re building, they’ll need to build their own carrier card, likely through one of our ODM partners,” Saban said. “We give them a starting point and a way to get off to the launch pad very quickly, we give them the schematics, we give them a known working platform, essentially… that allows them to go modify that to whatever they need.”

AMD’s embedded software stack is based on ROCm plus a robotics SDK (there is also a broader physical AI SDK). Robotics software, including the robotics operating system (ROS), is still maturing as humanoid robotics companies are still in the early stages of development.

“I think we’ll see a huge amount of investment there in the industry’s robotics stack,” Saban said. “Open source is how you move quickly… getting [our development platform] into the hands of hundreds and thousands of developers is going to accelerate the development of open-source models and software very, very rapidly.”

Saban said AMD understands the importance of building out an ecosystem for robotics and is working with OEM partners, model partners, middleware partners, sensor partners, system integrator partners, physical simulation partners, and verification partners.

AMD’s Kria AI Robotics developer platform is designed to help customers and developers prototype, build and deploy next-generation robotics and physical AI systems. (Source: AMD)

Displacing big GPUs

AMD’s ultimate aim is to displace big GPUs from robots as far as possible, Raje said.

“What we keep hearing is there is vendor lock-in with [competitors],” Raje said. “[Customers] want more freedom, more flexibility, more differentiation… they may want a variety of different board types, for example.”

Versus standalone FPGAs, which are anticipating big attach rates in robotics, customers are more focused on system-level performance and overall architecture, Raje said.

“We are in a very powerful position with CPUs, FPGAs and adaptive SoCs, because we can look at the entire architecture and co-design with customers for their solutions,” Raje said. “There are a lot of applications where CPUs sit next to FPGAs and adaptive SoCs—infotainment, ADAS, security firewalls, networking, robotics. What kind of conversation do you want to have? Do you want to have a discrete FPGA component conversation, or a whole-system-level conversation?”

AMD’s big benefit is it can bring the right type of compute for the problem, Saban added.

“The challenges in embedded are just so diverse and so different than client and server,” Saban said. “Whatever challenge you’re trying to solve, we can solve your system-level challenges… we can engage at the system architecture level. Not every nail needs a GPU hammer, and we can offer whatever type of compute is best-suited to your application, which is a huge differentiator versus any of our competitors. None of them can touch us in that area.”