AMD收购AI芯片初创公司Taalas
AMD收购了AI芯片初创公司Taalas。AMD计划将Taalas芯片与其GPU配合用于AI推理,可能作为大语言模型解码加速器。该消息由EE Times报道。
原文深度解读
AMD收购了AI推理芯片初创公司Taalas,该公司由前Tenstorrent CEO Ljubisa Bajic联合创立,其团队将加入AMD的AI组织。交易条款未披露。Taalas成立于2023年,其芯片通过硬连线模型实现高速推理,但仅支持特定模型。AMD计划将Taalas技术与其Instinct GPU集成,用于AI推理加速。文章还提及Nvidia收购Groq、AMD与Cerebras合作等背景,以及Taalas芯片的局限性和潜在应用场景。
- AMD收购了Taalas,后者由前Tenstorrent CEO Ljubisa Bajic联合创立,Bajic曾为AMD高管,团队将加入AMD的AI组织,交易条款未披露。
- Taalas成立于2023年,位于加拿大多伦多,2026年2月推出演示芯片,在Llama3.1-8B上实现每秒每用户超过16,000个token,远超竞争对手,但该芯片仅支持Llama3.1-8B。
- Taalas采用类似结构化ASIC的方法,硬连线模型数据流并烧录权重,推理速度快但几乎不可编程,更换模型需设计新芯片,通常需要两个掩膜,DeepSeek-671B需要约30次流片。
- Taalas开发了工具流程,可针对特定模型快速设计掩膜,目标约两个月内流片。
- AMD计划将Taalas技术集成到与Instinct GPU的系统级解决方案中。
- Nvidia收购了Groq,计划在系统中使用Groq芯片,仅用于推理解码阶段;AMD与Cerebras合作,由AMD GPU处理预填充,Cerebras晶圆级引擎加速解码。
供应链影响
- AMD可能将Taalas芯片作为其GPU的补充,用于AI推理加速,这可能影响AMD在AI加速器市场的竞争格局,但具体取决于技术整合和产品化进度。
- Taalas芯片的SRAM-based设计可能对存储和封装供应链产生影响,因为更大模型需要更多芯片,可能增加对高带宽存储和先进封装的需求。
- Taalas的快速流片能力可能缩短定制芯片的交付周期,这可能影响ASIC和FPGA市场的供应链动态,但取决于其工具流程的成熟度。
- AMD可能将Taalas技术用于边缘AI应用,如物理AI,这可能影响边缘计算芯片的供应链,但取决于功耗和成本优化。
- 收购尚需监管批准,可能影响AMD的短期供应链计划,但具体影响取决于审批结果和整合时间。
系统解读,仅作为判断线索,不构成备货、出货、涨价或投资建议。
AMD已收购AI推理芯片初创公司Taalas,该公司由前Tenstorrent CEO Ljubisa Bajic联合创立。Bajic曾为AMD高管,他和Taalas团队将加入AMD,隶属Vamsi Boppana领导的AI组织。交易条款未披露。
“我们创立Taalas,旨在从根本上重新思考AI推理,围绕模型构建硬件,”Ljubisa Bajic在声明中表示。“我们位于加拿大的团队结合了深厚的技术专长和挑战传统方法的意愿。加入AMD将为我们提供规模、工程资源和全球影响力,以加速我们的创新。”
Ljubisa Bajic
Taalas于2023年在加拿大多伦多成立,2026年2月走出隐身模式,推出演示芯片,在Llama3.1-8B上实现每秒每用户超过16,000个token。这是竞争对手当前一代芯片所能达到性能的数倍,但有一个问题——Taalas的首款芯片仅支持Llama3.1-8B。
这家初创公司借鉴了2000年代初结构化ASIC的一些理念;它本质上将模型的数据流硬连线在计算单元之间,并烧录权重。推理运行非常快,但几乎所有的可编程性都被移除,因此只能运行一个模型。
作者:Piyush Sancheti,中央工程解决方案(3D IC)副总裁,以及Todd Burkholder,3D IC技术作家,Siemens EDA 2026年8月5日
作者:Alessandro Chimera,行业解决方案负责人,Spotfire 2026年8月5日
作者:MRPeasy 2026年8月1日
切换到新模型需要设计新芯片——实际上通常需要两个掩膜,分别代表模型权重和数据流,Bajic今年早些时候告诉EE Times。由于该解决方案完全基于SRAM,更大的模型需要更多芯片;DeepSeek-671B大约需要30次独立的流片。Taalas的秘诀之一是其开发的工具流程,能够基于特定模型快速设计这些掩膜;公司目标是在大约两个月内流片特定工作负载的芯片。
AMD表示,计划将Taalas技术集成到与Instinct GPU的系统级解决方案中。
去年年底,市场领导者Nvidia几乎收购了AI芯片初创公司Groq,后者与Taalas类似,生成token的速度比Nvidia GPU快,但需要数十个芯片才能运行大型模型。Nvidia计划在系统中使用Groq芯片与GPU配合,仅依赖Groq处理推理解码阶段的关键部分。这种分解式推理设置使Groq芯片无需持有整个模型和KV缓存,同时保持token生成速度,而这是GPU的瓶颈。
AMD最近宣布与Cerebras合作开发类似的分解式解决方案,其中AMD GPU处理工作负载的预填充部分,Cerebras晶圆级引擎加速解码部分。Taalas的SRAM芯片可能替代Cerebras,与AMD GPU一起加速解码,但整个系统将由AMD控制和供应,方式更类似于Nvidia-Groq。
Taalas的首款芯片HC1专为Llama3.1-8B设计。(来源:Taalas)
AMD的其他选择包括将Taalas芯片用于小型模型的整个推理工作负载,或许用于物理AI等增长型应用,目前AMD在这些领域提供基于FPGA的加速器和SoC。边缘应用通常因功耗限制而运行较小模型,对成本更敏感,且不需要频繁更新模型,这可能非常适合Taalas类似结构化ASIC的方法。竞争对手Intel通过2018年收购eASIC获得了结构化ASIC技术,瞄准网络基础设施和国防应用。
单个Taalas芯片的极限似乎约为80亿参数,但这取决于模型量化的激进程度。
此次收购仍需满足交割条件和监管批准。
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Sally Ward-Foxton
Sally Ward-Foxton为EETimes.com和EETimes Europe杂志报道AI。Sally过去18年在伦敦撰写电子行业相关文章。她曾为Electronic Design、ECN、Electronic Specifier: Design、Components in Electronics等多家新闻出版物撰稿。她拥有剑桥大学电气与电子工程硕士学位。
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AMD has acquired Taalas, the AI inference chip startup co-founded by former Tenstorrent CEO Ljubisa Bajic. Bajic, a former AMD executive, and the Taalas team will join AMD under Vamsi Boppana’s AI organization. Terms of the deal weren’t disclosed.
“We founded Taalas to rethink AI inference from the ground up by building the hardware around the model,” said Ljubisa Bajic in a statement. “Our Canada-based team has combined deep technical expertise with a willingness to challenge conventional approaches. Joining AMD will give us the scale, engineering resources, and global reach to accelerate our innovation.”
Ljubisa Bajic
Founded in 2023 in Toronto, Canada, Taalas came out of stealth mode in February with a demo chip that could achieve more than 16,000 tokens per second per user on Llama3.1-8B. This is multiples of what competitors can achieve with current-gen chips, but there is a catch—Taalas’ first chip only runs Llama3.1-8B.
The startup has borrowed some ideas from the structured ASICs of the early 2000s; it essentially hardwires a model’s dataflow between compute elements and burns in the weights. Inference runs very fast, but almost all the programmability is removed, so only one model can be run.
By Piyush Sancheti, VP Central Engineering Solutions (3D IC), and Todd Burkholder, 3D IC Technology Writer, Siemens EDA 08.05.2026
By Alessandro Chimera, Industry Solutions Lead, Spotfire 08.05.2026
By MRPeasy 08.01.2026
Switching to a new model requires designing a new chip—in practice, usually closer to two masks, which represent the model weights and the dataflow, Bajic told EE Times earlier this year. Since the solution is entirely SRAM-based, bigger models would need more chips; DeepSeek-671B would need somewhere in the order of 30 separate tape-outs. Part of Taalas’ secret sauce is the tool flow it’s developed to enable quick design of these masks based on specific models; the company aims to tape-out workload-specific chips in around two months.
AMD said it plans to integrate Taalas’ technology into system-level solutions with its Instinct GPUs.
At the end of last year, market leader Nvidia all but acquired AI chip startup Groq, which, like Taalas, could generate tokens faster than Nvidia GPUs but required dozens of chips to run large models. Nvidia plans to use Groq chips in systems alongside its GPUs, relying on Groq for the critical part of the decode stage of inference only. This disaggregated inference setup frees Groq chips from having to hold the entire model and KV cache while maintaining token-generation speed, which was a bottleneck for GPUs.
AMD recently announced it’s working with Cerebras on a similar disaggregated solution, where AMD GPUs handle the prefill portion of the workload and the Cerebras wafer-scale engine accelerates the decode portion. A Taalas SRAM-based chip could potentially accelerate decode alongside AMD GPUs in place of Cerebras, but the entire system would be controlled and supplied by AMD in a way more analogous to Nvidia-Groq.
Taalas’ first chip, the HC1, is designed specifically for Llama3.1-8B. (Source: Taalas)
Other options for AMD would include using Taalas chips for the entire inference workload on small models, perhaps for growing applications like physical AI, where it currently offers its FPGA-based accelerators and SoCs. Edge applications often run smaller models due to power constraints, are more cost-sensitive, and don’t need to update models as frequently, which could be a good fit for Taalas’ structured-ASIC-like approach. Competitor Intel targets network infrastructure and defense applications with the structured ASIC technology it acquired with eASIC in 2018.
The limit for a single Taalas chip would seem to be around 8 billion parameters, though that’s dependent on how aggressively the model has been quantized.
The acquisition is still subject to closing conditions and regulatory approvals.
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Sally Ward-Foxton
Sally Ward-Foxton covers AI for EETimes.com and EETimes Europe magazine. Sally has spent the last 18 years writing about the electronics industry from London. She has written for Electronic Design, ECN, Electronic Specifier: Design, Components in Electronics, and many more news publications. She holds a Masters' degree in Electrical and Electronic Engineering from the University of Cambridge.
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