EE Times原文发布 09-30 23:40Radar 收录 10-01 00:01查看原文 ↗

台积电3纳米产能爬坡的历史对比视角

TSMC’s 3-nm Ramp Looks Different in Historical Context

中文摘要

台积电3纳米制程营收接近领先地位，但历史数据显示7纳米爬坡速度更快。文章建议在评判2纳米之前先对比相关数据。内容涉及台积电的先进制程节点营收与产能爬坡情况，与半导体供应链相关。

原文深度解读

文章以台积电（TSMC）的3纳米制程为对象，对比其与10纳米、7纳米、5纳米在各自爬坡前六个季度的晶圆营收占比，指出3纳米在第二季度达到30%晶圆营收、接近5纳米的33%，但历史数据显示7纳米爬坡更快。文章涉及台积电、制程节点、晶圆营收占比、产能与合并营收等关键数字，并提示在评判2纳米之前应先对比相关数据。与电子元器件供应链的关系在于：先进制程节点的营收爬坡速度、产能规模与产品需求结构，可能影响晶圆代工供给节奏和下游芯片供应。

原文称2026年第二季度台积电3纳米占晶圆营收30%，5纳米占33%，并引述近期行业报告称3纳米可能在下半年成为台积电最大营收制程家族。
原文按节点年龄而非日历日期对齐，比较10纳米、7纳米、5纳米、3纳米各自作为独立营收项目后的前六个季度晶圆营收占比：第二季度10纳米25%、7纳米23%、5纳米20%、3纳米15%；第六季度10纳米6%、5纳米23%、3纳米26%、7纳米35%。
原文指出7纳米继承了10纳米已开发的大部分制造平台，超过95%的设备兼容，并预期这种共通性支持快速良率爬坡；5纳米则计划大量使用EUV以减少工艺复杂性。
原文称各节点需求定位随时间变化：10纳米主要与性能驱动的移动产品相关，7纳米定位于移动和高性能计算，5纳米从一开始就针对移动和HPC优化。
原文给出产能与营收背景：台积电年产能从2019年略高于1200万片12英寸等效晶圆增至2024年约1700万片；7纳米在2019年第四季度达到35%晶圆营收时，合并季度营收约3170亿新台币（约99.5亿美元），3纳米在2024年第四季度达到26%时，季度营收约8680亿新台币（约272亿美元）。
原文提醒节点营收占比与合并营收不可直接相乘，并指出2024年第四季度3纳米占26%、5纳米仍占34%、7纳米占14%，说明代际重叠；2纳米将是下一个观察对象，其份额将同时反映制造学习继承、产品导入顺序和每单位领先产能的经济价值。

供应链影响

若3纳米营收占比继续接近或超过5纳米，台积电领先制程的产能分配可能进一步向3纳米倾斜，但具体节奏取决于客户产品导入和良率表现。
7纳米爬坡更快且与10纳米设备高度兼容，说明制造学习继承可能缩短新节点早期供给爬坡时间；对2纳米而言，其供给释放速度可能取决于可继承的制造平台与设备共通程度。
台积电年产能从2019年约1200万片增至2024年约1700万片12英寸等效晶圆，而季度营收增长更快，可能意味着领先制程单位产能的经济价值上升，但供应链影响取决于产品组合与定价结构。
3纳米、5纳米和7纳米在2024年第四季度同时贡献显著营收占比，显示多代节点重叠生产可能持续占用不同制程产能，下游芯片供应可能因此呈现多节点并行的供给格局。
原文强调营收份额同时反映制造学习、产品导入和经济价值，因此仅凭2纳米份额百分比可能不足以判断实际晶圆供给量或下游元器件供应松紧。

系统解读，仅作为判断线索，不构成备货、出货、涨价或投资建议。

正文内容 · AI翻译

中文英文

台积电的3纳米制程正接近一个重要里程碑。在2026年第二季度，它占晶圆营收的30%，仅次于5纳米的33%。近期行业报告显示，3纳米可能在下半年成为台积电营收最大的制程家族。

但其当前规模并不能说明它达到这一规模的速度。为了比较爬坡速度，我使用台积电的季度披露数据，追踪10纳米、7纳米、5纳米和3纳米各自作为独立营收项目后的前六个季度中，各节点占晶圆营收的比例。按节点年龄而非日历日期对齐，使爬坡可以直接比较。

（来源：台积电）

在第二个报告季度，10纳米已达到晶圆营收的25%。在同一时点，7纳米为23%，5纳米为20%，3纳米为15%。到第六个报告季度，情况看起来非常不同。10纳米降至6%，5纳米为23%，3纳米为26%，7纳米达到35%。

最新制程世代并未自动产生最快的营收份额爬坡。起始条件是不同的。

作者：Dr. Jim Shiely，Siemens EDA技术与战略顾问 2026年9月30日

作者：IAR by Qt Group 2026年9月25日

作者：Aveek Sarkar，TSMC生态系统与联盟管理部总监 2026年9月24日

台积电的7纳米制程继承了已为10纳米开发的大部分制造平台。该公司表示，两种制程之间超过95%的设备兼容，并预期这种共通性将支持非常快速的良率爬坡。其商业爬坡受益于从上一代继承的大量工艺学习。

5纳米涉及不同的过渡。台积电计划在5纳米大量使用EUV，部分是为了降低工艺复杂性，而7纳米则是围绕已建立的10纳米设备基础开发的。

营收份额曲线捕捉的不仅是客户采用。它们还反映新制程在首次出现有意义营收之前继承了多少制造学习。

每个节点背后的需求同时也在变化。10纳米与性能驱动的移动产品密切相关，尽管台积电也瞄准服务器和图形应用。到7纳米时，该制程被定位为同时面向移动和高性能计算。5纳米从一开始就针对移动和HPC进行优化。

制造运营的规模也发生了变化。台积电2019年的年产能略高于1200万片12英寸等效晶圆。到2024年，约为1700万片。

营收增长远快于产能。当7纳米在2019年第四季度达到晶圆营收的35%时，台积电报告的合并季度营收约为3170亿新台币（约99.5亿美元）。当3纳米在其爬坡的同一阶段、即2024年第四季度达到26%时，季度营收约为8680亿新台币（约272亿美元）。

这些数字不应直接相乘，因为台积电报告的节点组合是晶圆营收的百分比，而公司数字是合并营收。但它们显示了爬坡之下的经济基础已经发生了多大变化。

各世代也相互重叠。在2024年第四季度，3纳米占晶圆营收的26%，而5纳米仍占34%，7纳米另占14%。

2纳米现在是下一个考验。所有人都会关注它多快获得份额。但仅凭百分比将再次同时反映几件事，包括从上一代继承了多少制造学习、哪些产品先导入，以及台积电从每一增量领先产能中产生多少经济价值。

3纳米可能不是台积电最快的营收份额爬坡，但它仍可能成为其最大的制程之一。

另见：

台积电提高2026年预算，在美国增加1000亿美元

分析师称台积电HBM封装良率问题帮助英特尔

分析师称台积电将在2纳米节点领先竞争对手

CHIPLETS，SEMICONDUCTORS

TSMC

Ron Honig

Ron Honig是From Honig Family Office的联合首席执行官。他此前在科技行业工作超过二十年，包括在英特尔，长期关注半导体领域。

TSMC’s 3-nm process is approaching an important milestone. In the second quarter of 2026, it accounted for 30% of wafer revenue, just behind 5 nm at 33%. Recent industry reports suggest that 3 nm could become TSMC’s largest revenue-generating process family during the second half of the year.

But its current size does not tell us how quickly it got there. To compare ramp speed, I used TSMC’s quarterly disclosures to track each node’s share of wafer revenue over its first six quarters as a separate line item, for 10 nm, 7 nm, 5 nm, and 3 nm. Aligning the nodes by age, not calendar date, makes the ramps directly comparable.

(Source: TSMC)

In the second reported quarter, 10 nm had already reached 25% of wafer revenue. At the same point, 7 nm was at 23%, 5 nm at 20%, and 3 nm at 15%. By the sixth reported quarter, the picture looked very different. 10 nm had fallen to 6%, 5 nm was at 23%, 3 nm at 26%, and 7 nm had reached 35%.

The newest process generation has not automatically produced the fastest revenue-share ramp. The starting conditions were different.

By Dr. Jim Shiely, Technical and strategic advisor, Siemens EDA 09.30.2026

By IAR by Qt Group 09.25.2026

By Aveek Sarkar, Director, Ecosystem and Alliance Management Division, TSMC 09.24.2026

TSMC’s 7-nm process inherited a large part of the manufacturing platform already developed for 10 nm. The company said more than 95% of the tools were compatible between the two processes and expected that commonality to support a very fast yield ramp. Its commercial ramp benefited from a considerable amount of process learning carried over from the previous generation.

5 nm involved a different transition. TSMC planned extensive use of EUV at 5 nm in part to reduce process complexity, while 7 nm had been developed around much of the established 10 nm tool base.

Revenue-share curves capture more than customer adoption. They also reflect how much manufacturing learning a new process inherits before the first meaningful revenue appears.

The demand behind each node was changing at the same time. 10 nm was strongly associated with performance-driven mobile products, although TSMC also targeted server and graphics applications. By 7 nm, the process was being positioned for both mobile and high-performance computing. 5 nm was optimized from the outset for both mobile and HPC.

The size of the manufacturing operation changed too. TSMC’s annual capacity was just over 12 million 12-inch-equivalent wafers in 2019. By 2024, it was approximately 17 million.

Revenue grew much faster than capacity. When 7 nm reached 35% of wafer revenue in the fourth quarter of 2019, TSMC reported consolidated quarterly revenue of roughly NT$317 billion (~$9.95 billion). When 3 nm reached 26% at the same stage of its ramp in the fourth quarter of 2024, quarterly revenue was roughly NT$868 billion (~$27.2 billion).

Those figures should not be multiplied directly because TSMC reports node mix as a percentage of wafer revenue while the company figure is consolidated revenue. But they show how much the economic base underneath the ramp had changed.

The generations also overlap. In the fourth quarter of 2024, 3 nm represented 26% of wafer revenue, while 5 nm was still 34%, and 7 nm another 14%.

2 nm is now the next test. Everyone will watch how quickly it gains share. But the percentage alone will again reflect several things at once, including how much manufacturing learning carries over from the previous generation, which products move first, and how much economic value TSMC generates from each increment of leading-edge capacity.

3 nm may not be TSMC’s fastest revenue-share ramp, but it may still become one of its largest.