AI 电力需求推动 GaN 进入数据中心设计
AI 电力需求上升，推动数据中心设计者转向基于 GaN 的电源转换方案，以获得更高效率与功率密度。该内容与电子元器件供应链的关联在于 GaN 功率器件在数据中心电源中的应用方向。
原文深度解读
本文主题为 AI 算力性能快速提升迫使数据中心电源架构进行根本性重新设计，氮化镓（GaN）成为满足效率与功率密度要求的关键技术。涉及主体包括 Efficient Power Conversion（EPC）CEO Alex Lidow 与 DC/DC 营销与系统工程副总裁 Jason Zhang，场合为近期 EE Power Asia 2026 Spark Session。关键数字包括：AI 加速器功耗在三代 GPU 间增长四倍；未来两年单颗 GPU 功耗可能高达 5 kW、核心电压低于 1 V、电流接近 10,000 A；数据中心规模趋向吉瓦级；配电从 480 V 三相交流转向 800 V 直流母线，再经 12 V 或 6 V 等中间电压降至 GPU 核心电压；硅每代仅提升约 20%；EPC 第七代平台覆盖 18 V 至 40 V 低压产品，可在约 3 MHz 同步降压中高效开关，约为同类硅方案的 3 倍，路线图目标接近 10 MHz、电流密度约 5 A/mm²；GaN 可将 AC 到核心的整体效率提升 5%；EPC GaN 器件已在 AI 数据中心卡上部署八年。与电子元器件供应链的关联在于 GaN 功率器件在数据中心电源各级转换中的应用方向、制造产能与可靠性验证方式，以及从分立器件向集成 GaN 功率 IC 的演进。
- 原文指出 AI 加速器功耗在三代 GPU 间增长四倍，未来两年单颗 GPU 预计耗散高达 5 kW、核心电压低于 1 V、电流接近 10,000 A；当数据中心拥有数百或数千颗 GPU 时，规模趋向吉瓦级，这构成电源架构重新设计的直接驱动力。
- 原文描述供电链路需多级转换：从 480 V 三相交流到 800 V 直流母线，再经 12 V 或 6 V 等中间电压，最终到达 GPU 核心电压；每一级都需在极小板面空间内提供极高电流并降低损耗。
- 原文称传统将交流电直接引入服务器机架的架构正让位于集中式 sidecar 电源系统，向每个机架提供 800 V 直流母线，转换直接在服务器板上进行，从而取消笨重电源抽屉并减少配电损耗；Lidow 将服务器板空间称为“世界上最昂贵的不动产”，因此功率密度与效率同等重要。
- 原文认为硅 MOSFET 在导通电阻方面已接近理论极限，每代仅提升约 20%，无法跟上功耗需求速度；相比之下 EPC 第七代 GaN 平台在更高压器件及 18 V 至 40 V 低压产品上降低导通电阻与栅极电荷，可在约 3 MHz 同步降压中高效开关，约为同类硅方案的 3 倍，路线图目标接近 10 MHz、电流密度约 5 A/mm²。
- 原文称 GaN 已广泛用于 48 V 输入级，并正被设计进 800 V 输入转换器、中间总线转换器和负载点稳压器等更多级；Lidow 表示 GaN 已遍布服务器卡，硅不再能满足要求，且随转换更靠近 GPU，GaN 采用预计加速。
- 原文称 GaN 无产能约束，因其在硅衬底上使用 largely 常规硅制造设备并辅以外延生长，EPC 还依赖多个生态伙伴进行晶圆制造、测试、封装和物流；可靠性方面 EPC 在预期应用中评估器件、识别本征失效机制并修改设计与工艺，Lidow 称其 GaN 器件已在 AI 数据中心卡上积累八年部署且可靠性出色，Zhang 称现场可靠性主要变量是使用方式和客户侧，热界面、PCB 安装和散热器连接比器件本征可靠性更重要。
供应链影响
- 若 AI 服务器电源架构按原文所述从交流直供转向 800 V 直流母线并在服务器板上多级转换，GaN 功率器件在 800 V 输入、中间总线和负载点稳压等环节的用量可能增加，具体取决于各转换级的设计选择与导入节奏。
- 原文称 GaN 可在硅衬底上使用 largely 常规硅制造设备并辅以外延生长，且 EPC 依赖多个生态伙伴完成晶圆制造、测试、封装和物流，这可能意味着 GaN 供给的扩张更多取决于外延、封装测试与生态协作能力，而非传统硅产能本身。
- 原文称低压转换级因电流随电压降低而增大需要更多半导体面积，若该趋势成立，靠近 GPU 的 GaN 器件需求可能以面积和数量形式放大，对晶圆、封装与散热相关材料的需求可能随之变化，取决于实际功率等级与拓扑。
- 原文称 EPC 未来开发从分立晶体管转向集成 GaN 功率 IC，并提到分布式栅极驱动、单片功率级等方向，这可能推动供应链从分立器件采购向更高集成度功率 IC 与配套驱动、封装方案转变，取决于集成产品的成熟度与客户验证进度。
- 原文称 GaN 可将 AC 到核心整体效率提升 5%，且超大规模运营商日益评估整体设施效率，这可能使数据中心在电力、冷却与水耗方面的需求结构发生变化，进而影响相关电源与散热元器件的规格与选型，取决于设施规模与监管环境。
系统解读，仅作为判断线索，不构成备货、出货、涨价或投资建议。
AI 计算性能的快速提升正迫使数据中心电源架构进行根本性重新设计，氮化镓（GaN）正成为满足该行业不断升级的效率与功率密度要求的关键技术。
在近期 EE Power Asia 2026 Spark Session 上，Efficient Power Conversion（EPC）CEO Alex Lidow 与 EPC DC/DC 营销与系统工程副总裁 Jason Zhang 阐述了为何随着 GPU 功耗持续攀升，传统硅功率器件正接近其实际极限。
据 Zhang 称，AI 加速器的功耗在三代 GPU 之间增长了四倍。未来两年内，单颗 GPU 预计耗散高达 5 kW，同时核心电压低于 1 V，所需电流水平接近 10,000 A。
“当一个数据中心里有数百或数千颗 GPU 时，数据中心会向吉瓦级扩展，”Zhang 说。
作者：Omar Cruz，英飞凌 PSOC™ Edge 高级经理 2026.09.21
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满足这些要求需要多级功率转换，从 480 V 三相交流到 800 V 直流母线，随后经过 12 V 或 6 V 等中间电压，再到达 GPU 核心电压。每一级转换都必须提供极高电流，同时尽量减少损耗并占用尽可能少的板面空间。
AI 架构驱动电源重新设计
EPC 的 Alex Lidow
向 AI 基础设施的转变也在改变超大规模服务器内部的电力分配方式。
Lidow 表示，将交流电直接引入服务器机架的传统架构正让位于集中式 sidecar 电源系统，后者向每个机架提供 800 V 直流母线。功率转换随后直接在服务器板上进行，从而取消笨重的电源抽屉并减少配电损耗。
“机架现在接收的是 800 V 而不是交流电，它需要将其逐步降至最终 0.7、0.6 或 0.5 V 供 GPU 使用，”Lidow 解释道。
尽管更高的配电电压减少了流入服务器的电流，但最终转换级仍必须为现代 AI 处理器提供数千安培电流。这给功率转换器带来巨大压力，要求其同时实现高效率和高电流密度。
Lidow 将服务器板空间描述为“世界上最昂贵的不动产”，这使得功率密度与效率同等重要。更高的开关频率可减小磁性元件尺寸，从而让更多功率转换电路容纳在 AI 处理器周围的有限空间内。
硅正接近其极限
两位演讲者都认为，对于下一代 AI 系统，硅 MOSFET 技术已在很大程度上达到其性能上限。
Zhang 指出，硅多年来稳步改进，但目前在导通电阻方面正接近其理论极限。渐进式改进变得越来越困难，而 AI 功耗需求却继续加速。
“每一代仅提升约 20%，”Zhang 说。“这根本不够。它们无法跟上功耗需求的绝对速度。”
相比之下，GaN 器件继续快速改进。EPC 的第七代平台在更高压器件以及面向 AI 服务器内多级转换、覆盖 18 V 至 40 V 的新低压产品系列中，引入了更低的导通电阻和更低的栅极电荷。
更低的栅极电荷可实现更高开关频率，从而减小无源元件尺寸并提高整体功率密度。
EPC 的 Jason Zhang
Zhang 补充说，EPC 的 Gen 7 器件能够在同步降压转换器中以约 3 MHz 高效开关，约为同类硅实现通常达到的开关频率的 3 倍。
该公司的路线图目标为接近 10 MHz 的开关频率，从而为未来需要 10,000 A 电流的 AI 处理器实现约 5 A/mm² 的电流密度。
GaN 在服务器中全面扩展
Lidow 预计 GaN 将被部署到未来 AI 服务器内几乎每一个功率转换级。
如今，GaN 已广泛用于 48 V 输入级。随着 AI 架构向 800 V 配电和更低中间电压迁移，GaN 正被设计进更多转换级，包括 800 V 输入转换器、中间总线转换器和负载点稳压器。
“GaN 遍布服务器卡，硅不再能满足这些要求，”Lidow 说。
他解释说，低压转换级需要显著更多的半导体面积，因为电流随电压降低而增大。因此，随着功率转换更接近 GPU，GaN 的采用预计将加速。
“这几乎就像一股 GaN 浪潮正扫过那块服务器卡，”Lidow 说。
扩大制造规模并确保可靠性
围绕 GaN 广泛部署的一个担忧是制造产能。Zhang 认为这已不再是限制因素。
与碳化硅（SiC）不同，GaN 器件在硅衬底上生产，使用 largely 常规硅制造设备，并辅以外延生长工艺。EPC 还依赖多个生态伙伴进行晶圆制造、测试、封装和物流。
“GaN 的好处是 GaN 没有产能约束，”Zhang 说。
在近二十年的发展中，可靠性也已显著演进。
EPC 并非仅依赖传统硅鉴定方法，而是在其预期应用中评估 GaN 器件，识别本征失效机制，并修改器件设计和制造工艺以消除它们。
“就现场可靠性而言，主要变化变量是器件如何使用以及客户侧，”Zhang 说，并指出热界面、PCB 安装和散热器连接已成为比器件本征可靠性更重要的因素。
Lidow 补充说，EPC 的 GaN 器件已在 AI 数据中心卡上积累八年部署，具有“非凡的可靠性”。
与此同时，除了改善 GPU 供电，两位高管还认为 GaN 在降低数据中心整体运营成本方面发挥着越来越大的作用。
Zhang 指出，超大规模运营商日益评估整体设施效率，而不仅仅是处理器性能。即使转换效率的适度提升，也能显著降低吉瓦级 AI 设施的电力消耗、冷却需求和水耗。
“GaN 可以轻松地将从交流到核心的整体效率提升 5%，”Zhang 说。“这 5% 在运营成本方面意义重大。”
他还预计，随着 AI 基础设施扩张，环境考量将变得越来越重要，尤其是在电力消耗、水耗和社区影响受到更严格监管审查的地区。
下一步是什么
展望未来，Lidow 预计 AI 电源架构将继续向更高配电电压和更低中间总线电压演进。
他说，虽然 800 V 配电正成为行业基线，但未来 GPU 世代可能需要 1,200 V、1,500 V 甚至 2,000 V 的主母线，并由多电平转换器拓扑支持。中间总线预计将从 12 V 转向 6 V，然后再由 GaN 直接转换为低于 1 V 的 GPU 核心供电。
在 EPC 内部，未来开发正从分立晶体管转向日益集成的 GaN 功率 IC。
“我认为我们已经把 GaN 分立器件能榨取的都榨干了，”Lidow 说。“展望未来，我认为我们所有的开发都将是 IC。”
他认为，随着开关速度继续提高，集成将变得必要，从而实现分布式栅极驱动器、单片功率级以及仅靠分立元件无法达到的更高功能水平。
Lidow 总结说，随着计算需求增加，GaN 将继续扩大其在 AI 服务器内的作用。
“很明显，在服务器领域，GaN 将主导服务器卡，”他说。“我认为我们将拿下那里的每一个电源插座。”
本文最初发表于 EE Times Recommend ASEAN 电子指南 2026 年 7 月刊。
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The rapid increase in AI computing performance is forcing a fundamental redesign of data center power architectures, with gallium nitride (GaN) emerging as a key technology for meeting the industry’s escalating efficiency and power density requirements.
Speaking at the recent EE Power Asia 2026 Spark Session, Alex Lidow, CEO of Efficient Power Conversion (EPC), and Jason Zhang, VP of DC/DC marketing and system engineering at EPC, outlined why conventional silicon power devices are approaching their practical limits as GPU power consumption continues to climb.
According to Zhang, AI accelerators have experienced a fourfold increase in power consumption across three GPU generations. Within the next two years, individual GPUs are expected to dissipate as much as 5 kW while operating at core voltages below 1 V, requiring current levels approaching 10,000 A.
“When you have hundreds or thousands of GPUs in one data center, the data center scales toward a gigawatt,” Zhang said.
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Meeting those requirements requires multiple stages of power conversion, from 480-V three-phase AC to an 800-V DC bus, followed by intermediate voltages such as 12 V or 6 V before reaching the GPU core voltage. Each conversion stage must deliver extremely high current while minimizing losses and occupying as little board space as possible.
AI architectures driving power redesign
EPC’s Alex Lidow
The transition to AI infrastructure is also changing how power is distributed inside hyperscale servers.
Lidow said conventional architectures that brought AC power directly into server racks are giving way to centralized sidecar power systems that deliver an 800-V DC bus into each rack. Power conversion then occurs directly on the server board, eliminating bulky power supply drawers while reducing distribution losses.
“The rack now is receiving 800 V instead of AC, and it needs to break it down to eventually 0.7, 0.6 or 0.5 V for the GPU,” Lidow explained.
Although higher distribution voltage reduces current flowing into the server, the final conversion stages must still supply thousands of amperes to modern AI processors. This places enormous pressure on power converters to achieve both high efficiency and high current density.
Lidow described server board space as “the most expensive real estate in the world,” making power density as important as efficiency. Higher switching frequencies reduce the size of magnetic components, allowing more power conversion circuitry to fit within the limited space surrounding AI processors.
Silicon approaches its limits
Both speakers argued that silicon MOSFET technology has largely reached its performance ceiling for next-generation AI systems.
Zhang noted that silicon has steadily improved over the years but is now approaching its theoretical limit in terms of on-resistance. Incremental improvements have become increasingly difficult while AI power requirements continue to accelerate.
“Each generation improves only around 20%,” Zhang said. “It’s just not enough. They cannot keep up with the sheer speed of the power requirement.”
GaN devices, by comparison, continue to improve rapidly. EPC’s seventh-generation platform introduces lower on-resistance and lower gate charge across both higher-voltage devices and a new family of low-voltage products ranging from 18 V to 40 V, targeting the multiple conversion stages inside AI servers.
Lower gate charge enables higher switching frequencies, reducing the size of passive components while increasing overall power density.
EPC’s Jason Zhang
Zhang added that EPC’s Gen 7 devices are capable of switching efficiently at about 3 MHz in synchronous buck converters, roughly 3× the switching frequency typically achieved by comparable silicon implementations.
The company’s roadmap targets switching frequencies approaching 10 MHz, enabling current densities of roughly 5 A/mm² for future AI processors requiring 10,000 A of current.
GaN expands throughout the server
Lidow expects GaN to be deployed across virtually every power conversion stage inside future AI servers.
Today, GaN is already widely used in the 48-V input stage. As AI architectures migrate toward 800-V distribution and lower intermediate voltages, GaN is being designed into additional conversion stages, including 800-V input converters, intermediate bus converters, and point-of-load regulators.
“GaN is everywhere on the server card, and silicon no longer can meet these requirements,” Lidow said.
He explained that lower-voltage conversion stages require substantially more semiconductor area because current increases as voltage decreases. Consequently, GaN adoption is expected to accelerate as power conversion moves closer to the GPU.
“It’s almost like a wave of GaN going across that server card right now,” Lidow said.
Scaling manufacturing and ensuring reliability
One concern surrounding widespread GaN deployment has been manufacturing capacity. Zhang argued that this is no longer a limiting factor.
Unlike silicon carbide (SiC), GaN devices are produced on silicon substrates using largely conventional silicon manufacturing equipment, supplemented by epitaxial growth processes. EPC also relies on multiple ecosystem partners for wafer fabrication, testing, packaging, and logistics.
“The good thing about GaN is that GaN has no capacity constraint,” Zhang said.
Reliability has also evolved significantly over nearly two decades of development.
Rather than relying solely on traditional silicon qualification methods, EPC evaluates GaN devices within their intended applications, identifies intrinsic failure mechanisms, and modifies device design and manufacturing processes to eliminate them.
“The major variation variable in terms of field reliability is how the part is used and the customer side,” Zhang said, noting that thermal interfaces, PCB mounting, and heatsink attachment have become more significant factors than intrinsic device reliability.
Lidow added that EPC’s GaN devices have already accumulated eight years of deployment on AI data center cards with “phenomenal reliability.”
Meanwhile, beyond improving GPU power delivery, both executives argued that GaN plays a growing role in reducing overall data center operating costs.
Zhang noted that hyperscale operators increasingly evaluate total facility efficiency rather than only processor performance. Even modest improvements in conversion efficiency can significantly reduce electricity consumption, cooling requirements and water usage across gigawatt-scale AI facilities.
“GaN can easily improve overall efficiency by 5% from AC to the core,” Zhang said. “The 5% is a lot in terms of operating costs.”
He also expects environmental considerations to become increasingly important as AI infrastructure expands, particularly in regions where electricity consumption, water usage and community impact are receiving greater regulatory scrutiny.
What’s next
Looking ahead, Lidow expects AI power architectures to continue evolving toward higher distribution voltages and lower intermediate bus voltages.
While 800-V distribution is becoming the industry baseline, future GPU generations may require 1,200-V, 1,500-V or even 2,000-V primary buses, supported by multilevel converter topologies, he said. Intermediate buses are expected to move from 12 V toward 6 V before direct GaN conversion to sub-1 V GPU core supplies.
Within EPC, future development is shifting away from discrete transistors toward increasingly integrated GaN power ICs.
“I think we have squeezed all that we can out of GaN discretes,” Lidow said. “Going forward, I think all of our developments are going to be ICs.”
He believes integration will become necessary as switching speeds continue to increase, enabling distributed gate drivers, monolithic power stages, and higher levels of functionality that cannot be achieved with discrete components alone.
Lidow concluded that GaN will continue expanding its role inside AI servers as compute requirements increase.
“It is clear that in the world of servers, GaN will dominate the server card,” he said. “I think we will get every single power socket on there.”
This article was originally published in the EE Times Recommend ASEAN e-guide July 2026.
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