铠侠的闪存替代DRAM计划瞄准AI工作负载
铠侠推出CXL附加内存扩展方案,采用针对高速处理优化的NAND闪存,与AI计算设备协同工作。该计划旨在以闪存替代DRAM,应对AI工作负载对内存带宽和容量的需求。
原文深度解读
本文报道了铠侠(Kioxia)在东京简报会上展示的基于CXL(Compute Express Link)的存储模块,该模块采用其专有的XL-Flash NAND闪存,旨在替代部分DRAM以应对AI工作负载。文章涉及铠侠、美光、三星、SK海力士、长江存储等公司,时间标注为2026年9月。关键数字包括:声称同成本下内存容量翻倍、性能提升30%,CXL引入100-200纳秒延迟。文章分析了铠侠缺乏DRAM产品线的劣势、竞争压力,以及该技术对供应链的潜在影响。
- 铠侠在东京简报会上展示了基于CXL的模块,该模块围绕XL-Flash构建,XL-Flash是一种处理速度显著提升的专用NAND芯片。
- 铠侠声称,用CXL模块替代部分DRAM可以在相同成本下使内存容量翻倍,同时性能提升30%。
- CXL是一种接口标准,将系统内不同内存类型和设备整合为单一大型内存空间,允许按需动态分配容量。
- NAND闪存访问速度以微秒计,而DRAM以纳秒计;CXL引入100-200纳秒的额外延迟。
- 与美光、三星和SK海力士不同,铠侠没有DRAM产品线,这使其在竞争对手可利用DRAM和闪存技术的市场中处于劣势。
- 长江存储(YMTC)正在数月内缩小多年的技术差距,威胁铠侠在价格敏感型内存领域的地位。
供应链影响
- 如果铠侠的CXL模块获得服务器制造商和超大规模云服务商的设计采纳,可能扩大NAND闪存的市场规模,从而影响DRAM芯片的需求份额。
- 该技术的成功取决于生态系统支持,包括软件栈和系统设计,这可能影响服务器和内存供应链的协作模式。
- 铠侠的差异化策略可能加剧NAND闪存市场的竞争,尤其是在价格敏感领域,可能影响相关供应商的定价策略。
- CXL模块的采用可能推动内存分层架构在数据中心和边缘AI中的部署,进而影响内存和存储设备的采购决策。
- 铠侠缺乏DRAM产品线,其NAND替代DRAM的举措可能改变内存供应链中供应商的角色和竞争格局,但具体影响取决于技术验证和市场接受度。
系统解读,仅作为判断线索,不构成备货、出货、涨价或投资建议。
铠侠在实现用闪存替代部分服务于AI工作负载的DRAM这一雄心勃勃的目标上又迈进了一步。它在东京的一次简报会上展示了一个Compute Express Link(CXL)模块;该模块围绕XL-Flash构建,这是一种处理速度显著提升的专用NAND芯片。
这款CXL模块——旨在与AI计算一起替代部分DRAM内容——使用了针对高速处理优化的NAND闪存。铠侠声称,用CXL模块替代部分DRAM可以在相同成本下使内存容量翻倍,同时性能提升30%。
CXL附加内存扩展围绕XL-Flash构建,这是一种处理速度显著提升的专用NAND芯片。(来源:铠侠)
CXL——一种将系统内不同内存类型和设备整合为单一大型内存空间的接口标准——允许按需动态分配容量。因此,基于NAND的CXL模块在成本上与DRAM相比具有竞争力。虽然DRAM读取数据极快,但其容量难以扩展且价格更高。
另一方面,更便宜的基于NAND的CXL能够以比纯DRAM配置更低的成本实现超大型内存池。在这里,在某些AI工作负载中用NAND替代DRAM取决于不断发展的系统架构,这些架构能够容忍更高的延迟,以换取更大的密度和更低的每比特成本。
作者:Colin Duggan,BG Networks首席执行官兼联合创始人,2026年9月3日
作者:Teng Tang Yang,UMC产品营销部门高级总监,2026年9月3日
作者:Astella Technologies Limited,2026年9月2日
闪存的机遇窗口
NAND闪存在给定价格点上提供显著更大的存储容量,但其访问速度以微秒计,而DRAM以纳秒计。然而,数据中心分层和边缘AI中的新兴应用现在为设计用于管理混合延迟存储层级的系统提供了新的机会。
这些系统可以将对时间不太敏感的操作路由到基于闪存的内存,同时将DRAM保留给性能关键的任务。考虑数据中心环境中的机器学习(ML)模型推理,其中延迟可能并不重要,除非它比高带宽内存(HBM)差一个数量级以上。
接下来,在通常使用预训练模型的边缘AI中,铠侠的CXL模块与NAND大容量的优势相契合。它也不受NAND写入慢和耐久性有限的弱点影响,而且其低功耗特性适合对能源敏感的边缘环境。
在这个内存技术的十字路口,CXL模块可以提升NAND闪存的处理速度,作为在AI服务器中替代部分DRAM需求计划的一部分。因此,如果NAND能够在数据中心服务器和边缘AI等新兴应用中吸收部分DRAM容量,闪存的可寻址市场将扩大,而DRAM芯片的市场份额将减少。
CXL使用PCI Express的物理层,在与CPU和GPU一起使用时引入了100到200纳秒的额外延迟。(来源:铠侠)
然而,铠侠的闪存替代DRAM计划是一个补充策略,而非核心设计计划。它关注的是可以弥补DRAM缺失的专用NAND应用。但问题是:为什么是铠侠?
铠侠的内存使命
与其他顶级内存制造商——美光、三星和SK海力士——不同,铠侠没有DRAM产品线。这使得这家日本内存芯片制造商在竞争对手可以利用DRAM和闪存技术的市场中处于劣势。换句话说,铠侠对NAND闪存的单一关注已成为一个弱点。
此外,在NAND闪存领域,中国的长江存储科技(YMTC)正在数月内缩小多年的技术差距。这尤其威胁到铠侠在价格敏感型内存领域的地位。还有美光,在经历多年艰难时期后,已在NAND闪存市场重新获得势头。
这些竞争压力使铠侠寻求战略差异化。在这里,它必须通过新颖的计划从现有的NAND能力中提取价值:推出基于NAND的CXL模块以替代部分DRAM需求。但这只是故事的一半。
在基于NAND的CXL模块设计中,虽然技术权衡已广为人知,但实施需要软件栈和系统设计,以利用成本密度优势同时管理延迟惩罚。这反过来又需要来自服务器制造商、超大规模云服务商和软件供应商的生态系统支持。
如果没有设计胜利和生态系统支持,它仍将是对内存架构的前瞻性声明,而非内存行业的突破。因此,行业观察者热切期待铠侠的设计胜利公告;这些公告将验证NAND替代在内存密集型AI工作负载中的技术前提。
在那之前,铠侠开辟中间路径,将闪存定位为DRAM和存储之间的层级,仍将是一项进行中的工作。虽然这款未发布模块的技术细节在内存界引起波澜,但闪存作为DRAM替代品必须开辟差异化的收入流,才能成为持久的HBM孪生兄弟。
另请参阅:
精简版CXL扩展内存墙
NAND闪存在AI热潮中的命运逆转
从GPU到内存池:为什么AI需要Compute Express Link(CXL)
计算、Compute Express Link(CXL)、数据中心、DRAM、边缘AI、闪存、半导体
铠侠
Majeed Ahmad
Majeed Ahmad,EDN和Planet Analog的主编,报道电子设计行业超过二十年。在此期间,他担任过多种编辑职位,包括在EE Times Asia和Electronic Products的任职。他拥有埃因霍温理工大学电信工程硕士学位。
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Kioxia has moved one step closer to its ambitious goal of replacing DRAM with flash for some memory content serving AI workloads. It presented a Compute Express Link (CXL) module at a briefing in Tokyo; the module is built around XL-Flash, a specialized NAND chip with sharply improved processing speeds.
This CXL module—aimed at replacing part of DRAM content alongside AI compute—uses NAND flash optimized for high-speed processing. Kioxia claims that replacing some DRAM with CXL modules can double memory capacity at the same cost while improving performance by 30%.
The CXL-attached memory expansion is built around XL-Flash, a specialized NAND chip with sharply improved processing speeds. (Source: Kioxia)
CXL—an interface standard that ties together different memory types and devices inside a system into a single large memory space—allows capacity to be allocated dynamically as needed. As a result, a NAND-based CXL module is cost-competitive against DRAM. While DRAM reads data extremely fast, it is difficult to expand in capacity and is more expensive.
On the other hand, cheaper NAND-based CXL enables an ultra-large memory pool at a lower cost than a DRAM-only configuration. Here, substituting NAND for DRAM in certain AI workloads hinges on evolving system architectures that can tolerate higher latency in exchange for greater density and lower cost per bit.
By By Colin Duggan, CEO and co-founder, BG Networks 09.03.2026
By Teng Tang Yang, Senior Division Director of Product Marketing Division, UMC 09.03.2026
By Astella Technologies Limited 09.02.2026
Flash window of opportunity
NAND flash offers substantially more storage capacity at a given price point, but its access speeds are measured in microseconds rather than DRAM’s nanoseconds. However, emerging applications in data center tiering and edge AI now provide new openings for systems designed to manage mixed-latency storage hierarchies.
These systems can route less time-sensitive operations to flash-based memory while reserving DRAM for performance-critical tasks. Consider machine learning (ML) model inference in data center environments, where latency may not matter much unless it’s more than an order of magnitude worse than high-bandwidth memory (HBM).
Next, in edge AI, which commonly employs pre-trained models, Kioxia’s CXL module aligns with NAND’s advantage of large capacity. It’s also immune to NAND’s weaknesses of slow writes and limited endurance, and its low-power consumption suits energy-sensitive edge environments.
At this memory-technology crossroads, a CXL module can boost NAND flash memory processing speeds as part of the initiative to replace some DRAM demand in AI servers. Consequently, if NAND can absorb some DRAM capacity in data center servers and emerging applications such as edge AI, the addressable market for flash widens at the expense of DRAM chips.
CXL, which uses the physical layer of PCI Express, introduces an added latency of one to two hundred nanoseconds while being employed alongside CPUs and GPUs. (Source: Kioxia)
Nevertheless, Kioxia’s flash-for-DRAM initiative is a supplementary strategy rather than a core design initiative. It heeds specialized NAND applications that can offset the absence of DRAM. But the question is: why Kioxia?
Kioxia’s memory imperative
Unlike other top-tier memory producers—Micron, Samsung, and SK Hynix—Kioxia lacks a DRAM portfolio. That leaves the Japanese memory chipmaker exposed in a market where its key rivals can leverage both DRAM and flash memory technologies. In other words, Kioxia’s singular focus on NAND flash has become a liability.
Moreover, within the NAND flash space, China’s Yangtze Memory Technologies Co. (YMTC) is narrowing the multi-year technology gap in a matter of months. That especially threatens Kioxia’s position in price-sensitive memory segments. Then there is Micron, which has regained momentum in the NAND flash market after a difficult stretch spanning many years.
Such competitive pressures have left Kioxia searching for strategic differentiation. Here, it must extract value from its existing NAND capabilities through novel initiatives: enter the NAND-based CXL module to replace some DRAM demand. But that’s only half of the story.
In NAND-based CXL module design, while technical tradeoffs are well understood, implementation requires software stacks and system designs that exploit the cost-density advantages while managing latency penalties. That, in turn, calls for ecosystem support from server manufacturers, hyperscalers, and software vendors.
Without design wins and ecosystem support, it will remain a forward-looking statement regarding memory architecture rather than a memory industry breakthrough. Therefore, industry watchers are keenly awaiting design win announcements from Kioxia; they will validate the technical premise of NAND substitution in memory-intensive AI workloads.
Until then, Kioxia carving out a middle path to position flash as a tier between DRAM and storage will remain a work in progress. While the technical details of this unlaunched module are making waves in the memory world, flash as a DRAM proxy must open a differentiated revenue stream to become a persistent HBM twin.
See also:
Stripped Down CXL Scales Memory Wall
NAND Flash’s Reversal of Fortune Amid the AI Boom
From GPUs to Memory Pools: Why AI Needs Compute Express Link (CXL)
COMPUTE, COMPUTE EXPRESS LINK (CXL), DATA CENTERS, DRAM, EDGE AI, FLASH MEMORY, SEMICONDUCTORS
KIOXIA
Majeed Ahmad
Majeed Ahmad, Editor in Chief of EDN and Planet Analog, has covered electronics design industry for longer than two decades. During this period, he has worked in various editorial positions, including assignments for EE Times Asia and Electronic Products. He holds a Masters’ degree in telecommunication engineering from Eindhoven University of Technology.
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