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EE Times原文发布 08-14 21:01Radar 收录 08-15 00:16查看原文 ↗

英特尔再次站在存储十字路口

Intel at a Memory Crossroads, Again
中文摘要

EE Times报道,CPU专家英特尔再次关注存储业务,而存储芯片正从大宗商品转变为AI淘金热。文章未提及具体产品、时间或供应链细节。

原文深度解读

本文由EE Times于2026年8月13日发布,报道英特尔CEO Lip-Bu Tan在TechSurge播客中暗示英特尔将重返存储业务,并提及两项新技术XBM和ZAM。文章回顾了英特尔50年来与存储芯片的爱恨纠葛,包括DRAM、RDRAM、Optane和NAND业务的兴衰。关键人物包括Lip-Bu Tan、SK海力士前CEO Seok-Hee Lee。关键数字包括2020年以90亿美元出售NAND业务给SK海力士,ZAM预计2029-2030年推出,XBM预计2030年代初亮相。文章与电子元器件供应链相关,涉及存储芯片市场变化、AI需求、HBM竞争及英特尔代工业务。

  • 英特尔CEO Lip-Bu Tan在TechSurge播客中表示,存储芯片不再是商品,当前存储架构仍有创新空间,并暗示英特尔正在探索将存储堆叠在CPU上的技术,如Lunar Lake平台已将内存与CPU封装在同一封装中。
  • 英特尔近期聘请了SK海力士前CEO Seok-Hee Lee担任代工业务和先进封装技术执行副总裁,Lee曾在英特尔工作十年(2000-2010),后在SK海力士主导开发了高带宽内存(HBM)。
  • 英特尔于1969年推出首款商用SRAM(3101),1970年推出首款商用DRAM(1103),但1980年代初因日本厂商(NEC、日立、富士通)良率高出40%且成本更低,英特尔于1985年退出DRAM业务。
  • 英特尔1990年代末与Rambus合作推广RDRAM用于奔腾4,但因成本高和延迟高被DDR RAM取代,2001年放弃;2012年与美光合作开发Optane(基于3D XPoint),2017年上市,但未达预期,2022年停产。
  • 英特尔与美光合作3D NAND,但因商业采用不佳和亏损,于2020年以90亿美元将NAND业务出售给SK海力士。
  • 英特尔的两项新存储技术:XBM(跨批次内存)采用后端晶体管,通过UCIe链接串行化数据,避免使用硅中介层,目标匹配HBM4物理尺寸;ZAM(Z角内存)与软银子公司Saimemory合作,采用融合键合堆叠九层DRAM,目标带宽密度约为HBM4的两倍,预计2029-2030年推出。

供应链影响

  • 英特尔重返存储市场可能改变存储芯片供应格局,但具体影响取决于其制造能力和技术商业化进度。
  • XBM和ZAM技术若成功,可能减少对TSMC CoWoS封装技术的依赖,影响先进封装供应链的竞争态势。
  • 存储短缺预计持续到2030年后,英特尔的新技术可能缓解供应压力,但取决于量产时间和良率。
  • 英特尔聘请SK海力士前CEO可能加强其与存储供应链的联系,但可能引发与现有存储厂商的竞争或合作变化。
  • 英特尔需要建设存储制造基础设施,可能涉及资本支出和合作伙伴关系,具体影响取决于其资金筹集和执行能力。

系统解读,仅作为判断线索,不构成备货、出货、涨价或投资建议。

正文内容 · AI翻译

英特尔,一家从半导体存储先驱转型为CPU巨头的公司,正在再次关注存储世界,而存储世界本身已从高度周期性的商品业务转变为AI金矿。英特尔CEO Lip-Bu Tan在Michael Marks主持的TechSurge播客中透露了这一动向。

Tan谈话的核心是存储芯片不再是商品,当前的存储架构仍有很大的创新空间。这可以理解,因为AI深刻改变了存储芯片市场。此外,行业观察人士认为存储短缺将持续到2030年以后。

Tan还暗示英特尔正在探索将存储堆叠在CPU上的方法。“英特尔不仅考虑用新架构构建CPU,还在致力于将CPU与堆叠DRAM能力相结合。”以英特尔的Lunar Lake平台为例,该平台将内存与CPU封装在同一封装中。

Lip-Bu Tan:存储不再是商品业务,具有巨大的创新潜力。(来源:英特尔)

行业观察人士迅速将Tan的存储言论与英特尔最近聘请SK海力士前CEO Seok-Hee Lee担任代工业务和先进封装技术执行副总裁联系起来。Lee在英特尔工作了十年(2000年至2010年),随后领导SK海力士,在开发高带宽内存(HBM)方面发挥了重要作用,HBM现在与每个主要AI加速器相伴。

作者:Krizelle Paulene Apostol,软件系统工程师;Jamila Macagba,高级软件系统工程师;Maggie Maralit,软件系统设计工程经理 2026年8月13日

作者:Isaac Lopez,OmniScale Media总裁;Charity Plata,SC26通信主席 2026年8月13日

作者:Morten Block,全球工程总监,细分市场和技术市场推广 2026年8月13日

尽管有这些存储暗示和宠物项目讨论,Tan并未公布任何明确计划。甚至不清楚这些存储架构创新的宠物项目是英特尔的举措,还是属于他通过Walden International(他创立并仍担任主席的风险投资公司)进行的个人投资。

然而,Tan的“存储言论”已在业界引起波澜。它也引发了人们对英特尔在这个行业漫长旅程的回忆。以下是英特尔与存储半导体长达半个世纪的爱恨关系的一瞥。

存储怀旧

当Robert Noyce和Gordon Moore于1968年创立英特尔时,公司主要专注于半导体存储,因为当时存储芯片昂贵、制造困难,且由磁芯存储器主导。英特尔旨在使存储更快、更小、更便宜。

英特尔于1969年推出首款商用SRAM(3101),随后于1970年推出首款商用DRAM(1103)。DRAM取得了重大商业成功,使英特尔成为领先的存储芯片公司。然而,到1980年代初,NEC、日立和富士通建立的制造业务生产的芯片良率比美国公司高出40%,且成本是美国芯片制造商无法匹敌的。

来自更便宜、更高良率的日本存储芯片的巨额亏损迫使英特尔于1985年退出DRAM业务,并将重点转向x86 CPU。然而,英特尔在1990年代末重返存储业务,与Rambus合作推广用于奔腾4处理器的RDRAM。但RDRAM更高的成本和延迟导致市场青睐DDR RAM,因此英特尔于2001年放弃了这一计划。

接下来,英特尔于2012年开始与美光合作开发Optane——一种DRAM和NAND的高速混合体。基于3D XPoint技术的Optane于2017年上市,但HBM和多层3D堆叠存储等竞争技术更便宜且更有前景。因此,Optane从未达到预期成功,英特尔于2022年将其关闭。

Optane价格昂贵且仅略有改进。(来源:英特尔)

英特尔还与美光合作涉足3D NAND闪存技术。但由于商业采用不佳和巨额亏损,英特尔于2020年以90亿美元将NAND业务出售给SK海力士。

“在可能最糟糕的时刻退出存储业务;听起来就像英特尔,”Reddit上的一篇帖子指出。另一篇帖子更严厉:“每次英特尔决定进入一个市场,市场已经处于顶峰。每次他们离开一个市场,市场才刚刚开始增长。”还有一篇帖子称其为“董事会带来的创新”。

然而,一位论坛参与者指出,英特尔在1980年代的DRAM业务并不盈利,因此它押注于386处理器的成功。“那是正确的决定,因为此后英特尔大幅增长。”所以,最终有利有弊。

英特尔的XBM和ZAM存储技术

虽然Tan的存储架构创新宠物项目尚不清楚,但英特尔的两项即将推出的存储技术计划——跨批次内存(XBM)和Z角内存(ZAM)——备受关注。ZAM目前计划于2029-2030年推出,而XBM可能在下个十年初亮相。

XBM是一种超高频宽内存,采用后端晶体管,旨在匹配HBM4的物理尺寸。这是对DRAM构建和连接方式的根本性重新思考。HBM芯片通过硅中介层连接到其主处理器,这增加了成本,限制了封装尺寸,并且目前几乎完全在台积电的CoWoS(晶圆上芯片封装)技术上进行组装。

XBM将数据串行化到UCIe(通用小芯片互连快速通道)链接上,而不是通过中介层路由。此外,与传统DRAM将单晶体管单电容(1T1C)存储单元放置在前端硅层不同,XBM将这些单元移至后端(BEOL),从而释放前端硅用于更多硅通孔(TSV)。

XBM通过架构变化解决HBM的局限性。(来源:英特尔)

另一方面,ZAM——英特尔与软银子公司Saimemory共同开发的存储架构——使用融合键合组装九层堆叠的、基本传统的DRAM,每层之间约有3微米薄的硅。其目标带宽密度约为HBM4的两倍。

英特尔在1985年选择了逻辑而非存储,现在正重返其存储根源,XBM和ZAM计划证明了这一转变。然而,尽管考虑到AI深刻改变了存储市场,这很有道理,但英特尔需要的不仅仅是存储架构的创新。例如,它需要制造存储芯片的基础设施。还有多次在存储市场尝试失败的心理负担。

未来几天可能会公布更多关于英特尔存储雄心的细节,这将确立这家总部位于加州圣克拉拉的芯片制造商在存储业务中的信誉。这也将展示英特尔——目前急需资金用于其代工业务和以AI为中心的CPU研发——将如何执行这一重返存储业务的重大任务。

另请参阅:

记住英特尔的PROM骑士

亏损的Optane会留下什么遗产?

SK海力士NAND闪存交易与英特尔存储业务简史

CPU、DRAM、高带宽内存、存储短缺、半导体、供需

英特尔、美光科技、SK海力士、Walden International

Intel, a semiconductor memory pioneer that transformed into a CPU behemoth, is heeding another return to the memory world, which itself has transformed from a highly cyclical commodity business to an AI gold mine. Intel CEO Lip-Bu Tan telegraphed this move in the TechSurge podcast hosted by Michael Marks.

The crux of Tan’s talks was that memory chips are no longer a commodity and that current memory architectures leave plenty of room for innovation. That’s understandable because AI has profoundly changed the memory chip market. Moreover, industry watchers believe that memory shortages will persist beyond 2030.

Tan also hinted at Intel exploring ways to stack memory on top of a CPU. “Intel isn’t just looking at building CPUs with new architectures but is also working on embedding CPUs with stacked DRAM capabilities.” Take the case of Intel’s Lunar Lake platform, which features memory in the same package as the CPU.

Lip-Bu Tan: Memory is no longer a commodity business and holds tremendous innovation potential. (Source: Intel)

Industry observers are quick to link Tan’s memory talk to Intel’s recent hiring of SK Hynix’s former CEO, Seok-Hee Lee, as executive VP of the foundry business and advanced packaging technologies. Lee spent a decade at Intel from 2000 to 2010, then went on to lead SK Hynix, where he was instrumental in developing high-bandwidth memory (HBM), which now sits alongside every major AI accelerator.

By Krizelle Paulene Apostol , Software Systems Engineer, Jamila Macagba , Senior Software Systems Engineer, and Maggie Maralit , Software Systems Design Engineering Manager 08.13.2026

By Isaac Lopez, President, OmniScale Media & Charity Plata, Communications Chair, SC26 08.13.2026

By Morten Block, Global Eng. Director, Segments and Technology go-to-market 08.13.2026

Despite all this memory teasing and talk of pet projects, Tan didn’t unfold any definitive plan. It’s not even clear whether these pet projects for memory architecture innovation are Intel initiatives or whether they fall under his personal investments through Walden International, the venture capital firm he founded and still chairs.

Nevertheless, Tan’s “memory talk” has been making waves across the industry. It has also triggered a trip to memory lane of Intel’s long journey in this industry. Below is a sneak peek at Intel’s love-hate relationship with memory semiconductors spanning half a century.

The memory nostalgia

When Robert Noyce and Gordon Moore founded Intel in 1968, the company focused heavily on semiconductor memory because, at that time, memory chips were expensive, difficult to manufacture, and dominated by magnetic-core memory. Intel aimed to make memory faster, smaller, and cheaper.

Intel launched the first commercial SRAM (3101) in 1969 and later the first commercial DRAM (1103) in 1970. DRAM became a major commercial success, making Intel a leading memory chip company. However, by the early 1980s, NEC, Hitachi, and Fujitsu had built manufacturing operations that produced chips with yields up to 40% higher than U.S. companies, and at costs U.S. chipmakers could not match.

Heavy losses from cheaper, higher-yield Japanese memory chips forced Intel to exit DRAM in 1985 and shift its focus to x86 CPUs. However, Intel returned to the memory business in the late 1990s to push RDRAM for the Pentium 4 processor in partnership with Rambus. But RDRAM’s higher cost and latency led the market to favor DDR RAM, and as a result, Intel abandoned this initiative in 2001.

Next, Intel began developing Optane—a high-speed hybrid of DRAM and NAND—with Micron in 2012. Optane, based on the 3D XPoint technology, hit the market in 2017, but competing technologies such as HBM and multilayer 3D stacked memory were cheaper and more promising. As a result, Optane never achieved the expected success, and Intel shut it down in 2022.

Optane was expensive and only marginally better. (Source: Intel)

Intel also ventured into 3D NAND flash technology in partnership with Micron. But poor commercial adoption and heavy losses led Intel to sell its NAND business to SK Hynix for $9 billion in 2020.

“Exiting the memory business at literally the worst possible moment they could do it; Sounds exactly like Intel,” noted a post on Reddit. Another post was even harsher: “Every time Intel decides to join a market, the market is already at its peak. Every time they leave a market, the market is only starting to grow.” Then there was a post calling it “Innovation brought to you by the boardroom.”

However, a forum participant noted that Intel’s DRAM business wasn’t profitable in the 1980s, so it bet on the success of the 386 processors. “That was the right call since Intel grew tremendously after that.” So, in the end, it cut both ways.

Intel’s XBM and ZAM memory technologies

While Tan’s pet projects for memory architecture innovation remain unclear, Intel’s two upcoming memory technology initiatives—cross-batch memory (XBM) and Z-angle memory (ZAM)—are in the spotlight. ZAM is currently slated for 2029–2030, while XBM could be unveiled at the start of the next decade.

XBM is an ultra-high-bandwidth memory with back-end transistors designed to match HBM4’s physical footprint. It’s a fundamental rethinking of how DRAM is built and connected. An HBM chip connects to its host processor across a silicon interposer, which adds cost, constrains package dimensions, and is currently assembled almost exclusively on TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) packaging technology.

XBM serializes data onto Universal Chiplet Interconnect Express (UCIe) links instead of routing through an interposer. Furthermore, unlike conventional DRAM, which places its one-transistor, one-capacitor (1T1C) memory cells in the front-end silicon layers, XBM moves those cells to the back-end-of-line (BEOL), freeing the front-end silicon for more through-silicon vias (TSVs).

XBM addresses HBM limitations with architectural changes. (Source: Intel)

On the other hand, ZAM—a memory architecture Intel is co-developing with Saimemory, a SoftBank subsidiary—uses fusion bonding to assemble a nine-layer stack of largely conventional DRAM with approximately 3-µm-thin silicon between each tier. It’s targeting roughly twice the bandwidth density of HBM4.

Intel, which chose logic over memory in 1985, is heading back to its memory roots, and XBM and ZAM initiatives are a testament to this shift. However, while it makes sense given how profoundly AI has changed the memory market, Intel will need more than innovation in memory architectures. For example, it will need infrastructure to manufacture memory chips. Then there is the psychological burden of making several unsuccessful forays in the memory market.

More details are likely to emerge about Intel’s memory ambitions in the coming days, and they will establish the Santa Clara, California-based chipmaker’s credentials in the memory business. That will also show how Intel—currently in desperate need of capital for its foundry business and R&D on AI-centric CPUs—will execute this massive undertaking to return to the memory business.

See also:

Remembering the PROM Knights of Intel

What Legacy Will Money-Losing Optane Have?

SK Hynix NAND Flash Deal and a Brief History of Intel’s Memory Business

CPUS, DRAM, HIGH-BANDWIDTH MEMORY, MEMORY SHORTAGE, SEMICONDUCTORS, SUPPLY AND DEMAND

INTEL, MICRON TECHNOLOGY, SK HYNIX INC., WALDEN INTERNATIONAL

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